Baics of Flash Memory Operation: Part 2

These different tunneling regimes can also be classified in terms of the potential drop that you get across your oxides. So for a Fowler-Nordheim tunneling. the defining parameter is that you have this potential drop across your oxide, which I’ve labelled as Vox, this should be greater than the barrier that your uh,carriers see for Tunneling, from the oxide side. So, as you can see if your potential drop here is larger than the barrier then these carriers will see this triangular shaped barrier or tunneling and the, the tunneling current is essentially just related to this barrier that your carrier see over tunneling, and it’s also related to this, electric, field across your oxide, and, most of that, functional, dependence, comes from this, exponential term, so there’s a minus sign over here.

So you can see my tunneling current is related exponentially to a power of three half the power of my tunneling barrier. So, the higher is my tunneling barrier, the lower is my tunneling current, similarly the higher is my electric field, so I get lower exponential term over here, also I have a square dependence over here. So higher is my electric field, exponentially higher is my tunneling current in this Fowler-Nordheim regime. In a direct tunneling regime essentially my drop across my oxide is less than this barrier that my electron sees. the defining equation in this case is as my drop across my oxide is less than this barrier.

So my carriers will essentially see this trapezoidal kind of barrier and I can again express my my dependence of my tunneling current using this equations it’s similar as this Fowler-Nordheim dependence. The extra term that you get is essentially you also. Your barrier now also has to factor in this drop across your oxides, so that phi B essentially it gets modified and you get this dependence on your, drop across this oxide as well. So, you get a, in fact, you get a larger gate dependence in your direct tunneling regime than your Fowler-Nordheim tunneling regime. So if I plot this my gate current, as a function of my voltage across this MOS capacitor.

I can, clearly identify these, three, tunneling regimes. And, you can see, that when you’re, below a certain, voltage. You get a very low current. And you essentially have very little tunneling. And then similarly if you are if you go to a very high voltage you get this very high current and then you are in in this Fowler–Nordheim tunneling in between these Fowler–Nordheim and no is direct tunneling regime Which is also classified by this very strong functional dependence on your, on your applied voltage.

So from a point of view of flash memory operation, there are two important things. One is that, we want to operate in these different regimes depending upon we want to program the cell or we want to retain the charge. So when we want to program the cell, we essentially want to operate in this regime, we want a high current. We want to program our cell very quickly. So this is the regime. Where we want to operate when we are programming the sensor, we apply a high gate voltage so that you get a high program current. When we are in the retention state, essentially when we have programmed the cell and want to retain the charge we want to be essentially in this region where you have very less very less for tunneling current.

So this is the regime we want to be when we want to be in retention. And this is many times you, you actually when you are programming a adjacent cell you Or you are reading a cell you get the, you are often, misplaced, in this, regime which, causes this, read disturb or, program disturb that we’ll, talk about. Another important thing, from a flash memory point of view is that, you know, until a very first order.

None of these, equations, is, have any temperature dependence. So, that is in fact a good thing. So tunneling is, to a first order, it’s a temperature, independent, phenomena. And, this is, if you think about it this is really important, because, when you store your things in your iPod or your iPhone and it heats up, you don’t want, that data to be lost. And similarly, you want your You know your memory to be functioning properly when though your, your phone has turned a little hot So that this, this a lot of that relief comes from that fact that these are tunneling are essentially temperature independent to the very first order. What I want to next is to describe to you the program arrays and retention behavior in our flash memory and specifically I want to talk, restrict myself to the NAND flash memory.

And the three ingredients that I want to use for describing this is the first ingredient is a capacitive coupling that we just talked about. So I boxed out this formula which relates my potential on my floating gate to the control gate potential and the charge on the floating gate and the, for the reason of simplification, I can further simplify this by assuming that my drain voltage is zero. So in that case I can further simplify this formula and I can substitute this capacitive ratio, of this capacitive coupling, with my control gate to the total coupling as my As my gate coupling ratio, and what I get is essentially this formula which says that my potential on my floating gate is related to my, potential on my control gate by this gate coupling ratio, and the charge of the floating gate.

So let me box this again as I will be using this formula again and again to describe this, program and, its operation. The other partner in crime that I’ve recruited in explaining to you this programming operation is the, is the tunneling and we discussed, we have these three different regions of tunneling. Depending upon what, gate voltage we are operating at. And the third of, you know, the third tool that I want to use is essentially the band diagram. And I’m sure you are all familiar with the, the band diagram. So if I look at my, flash memory And if I take a cross section along this direction, so this is how my band diagram along that cross section would look like.

So I’d have my silicon substrate. Then have my floating gate and then I have my control gate. And this oxide between my floating gate and my silicon substrate is often called as a tunnel oxide, other tunnel dielectric and that is because, most of the tunneling of, electrons or, holes across, across this, dielectric. The dielectric, which is between my, control gate and my, floating gate. It’s, often called as IPD or Inter-Poly Dielectric because it’s, traditionally, this floating gate used to be made out of poly-silicon and the control gate also used to be also made of poly.

So this, inter, this dielectric between two poly layers, that’s why it was called inter, poly, dielectric. It’s also, sometime, called as the blocking oxide. Or a block. Blocks, because it essentially blocks the tunneling current electrons from tunneling from this floating gate gate to this control gate. And traditionally the tunnel oxide had been thicker thinner in thickness as compared to the blocking oxide. So, this tunnel oxide used to be thinner as to compared to the IPD dielectric, and we learn this just in a moment why that was the case. So, with all these three twos in place, the capacitive coupling and tunneling in the band diagram. Let me attack the problem. And I will start first by, describing to you how the program how the cell is programmed. So first things first we need to decide what voltage do we apply when we want to program the cell. So the voltage we apply is typically we ground our source and drain, we also ground our body and we apply a high potential voltage on our control gate. This In current technology, ranges somewhere between 15 to 18 Volts. it’s a very high voltage that you apply on your control gate to program your NAND flash cell.

So let’s look at what, what happens to the band diagram as we do so. So, essentially I described this formula which relates my floating gate potential to my gate potential. So, in this case, what I’ve done is I’ve applied a high, high potential here. So I applied 15 volt of a voltage on my control gate. To start with, I can assume that, you know, I’m just starting with a virgin cell. And it has a zero charge on my cell to start with. So what I get is, according to this formula, I get a very high voltage so I can multiply it with my gate coupling ratio is So I get nine volts, on my, on my floating gate.

So this is the band diagram drawn at t=0 So there’s no charge on the floating gate. So the charge on the floating gate is zero. And I get, I apply, 15 volts of voltage here and I get, nine volts of, voltage here. And my, substrate is at, zero volts. So I get nine volt of voltage drop across here. So this is, much larger than the barrier for, tunneling of electrons. This barrier, for tunneling of electrons is uh,, you know, somewhere around 4 eV so I have a much higher barrier.

I have a much larger potential difference here, and I get a large amount of tunnel current into my floating gate. At the same time the potential difference between my floating gate and my control gate is only six volts, and also its This is a thicker dielectric so I get, I get tunnel current out but it’s a much smaller current which is tunneling out. So, what I get is I get a much higher incoming current and enough electron then I get a much lower outgoing current of electrons. So, if I, if I tabulate my incoming and outgoing current, so I get much more higher J in and I get a small J out at t=0 And as, as time progresses what happens is since I have more electrons coming in then going out I start up, building up this charge in my floating gate. So let’s say I’m at, at some intermediate point and what happens is Now instead of, charge on the floating gate being zero there, quite of bit of these electron stored on my floating gates.

So I have, let’s say, you know, somewhere, half of the number of electrons that I’m going to store I have already stored them over here and what it results is Essentially since I have this negative negative charge over here it reduces the potential on my floating gate. So maybe to start with my floating gate was at nine volts, now maybe let’s say I reduce it to seven volts. Remember my control gate is still at 15 volts. My substrate is still at zero. So the potential difference, between my, floating gate and my, substrate decreases. So this, as compared to here, I have, less, electric, field, in this, area.

So what happens is then my incoming current, decreases, slightly. At the same time, the potential difference between my floating gate and my control gate increases, so my outgoing current, increases. So what I have in this intermediate point, and maybe my incoming current is going down and my outgoing current is, going up. And, but I, I’m still getting more incoming current as compared to my outgoing current. So I keep on, building up, this, charge on my floating gate and as I keep on doing so, as this charge is negative, this, potential on my floating gate keeps on going down. So let’s say, now I have reached a point where I have a let’s say in this case a six volt across my floating gate. And also and let’s these two potential effects have 15 volts on my control gate and zero volt on my substrate.

So what will happen now? Eventually is that I, my number of incoming electrons will further reduce. I already have built up quite a few of my pont, my charge on my floating gate. At the same time this potential difference between my floating gate and control gate will increase so my outgoing current will increase. So what happens over time is essentially I. I reach a point where, my incoming and outgoing current become equal and I often, people often define that time as a, the saturation time or you know, when you get a saturation of charge in your floating gate.

As found on Youtube